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IJMLC 2013 Vol.3(3): 291-293 ISSN: 2010-3700
DOI: 10.7763/IJMLC.2013.V3.323

Parallel Processing Architecture for ECG Signal Analysis

Poorna Chandra Suraj B. N, Veena Hegde, and Abhishek Kumar Thakur

Abstract—Research in detecting QRS peaks in ECG signals has progressed to an acceptable extent and hence has gained adequate confidence with respect to the validity of the outputs produced. In view of the dynamics associated with ECG signals, their variants among subjects owing to varied types of problems encountered; it has become essential to, continuously, expand the scope of analysis to provide more and useful information from the ECG data. This warrants for a flexible architecture for ECG signal analysis. This paper presents one such flexible architecture. The authors are working towards identification of appropriate interfaces and their definitions.

Index Terms—QRS detection, ECG signal analysis, parallel processing, cardiac arrhythmia.

Poorna Chandra Suraj B. N is with the University of Warwick, Coventry, United Kingdom (e-mail: poornachandra.suraj@gmail.com). Veena Hegde is with the Department of Instrumentation Technology, B.M.S College of Engineering, VTU, Karnataka, India (e-mail: veena.bms@gmail.com). Abhishek Kumar Thakur is with the Electronics Engineering Department, National Institute of Technology, Surat, India (e-mail: abhishek4@gmail.com).


Cite:Poorna Chandra Suraj B. N, Veena Hegde, and Abhishek Kumar Thakur, "Parallel Processing Architecture for ECG Signal Analysis," International Journal of Machine Learning and Computing vol.3, no. 3, pp. 291-293, 2013.

General Information

  • E-ISSN: 2972-368X
  • Abbreviated Title: Int. J. Mach. Learn.
  • Frequency: Quaterly
  • DOI: 10.18178/IJML
  • Editor-in-Chief: Dr. Lin Huang
  • Executive Editor:  Ms. Cherry L. Chen
  • Abstracing/Indexing: Inspec (IET), Google Scholar, Crossref, ProQuest, Electronic Journals LibraryCNKI.
  • E-mail: ijml@ejournal.net

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